T8207

www.DataSheet4U.com Advance Data Sheet September 2001 CelXpres™ T8207 ATM Interconnect 1 1.1 s s Product Overview Features s Programmable priority for control/data cells transmission onto cell bus Eight GPIO pins JTAG support Optional monitoring of misrouted cells Microprocessor interface, supporting both Motorola® and Intel ® modes (multiplexed and nonmultiplexed) Control cell transmission and reception through microprocessor port Single 3.3 V power supply 3.3 V TTL I/O (5 V tolerant) 272-pin PBGA package Industrial temperature range (–40 °C to +85 °C) s s s s > OC-3 transport capability UTOPIA level 1 and 2 (8-bit) cell-level handshake interface (ATM or PHY layers) 32 multi-PHY (MPHY) operation Shared UTOPIA mode Egress SDRAM buffer support to expand UTOPIA output priority queues for 32K to 512K cells: — 64 queues configurable up to four queues per PHY with programmable sizes — Programmable number of UTOPIA output queues with four levels of priority s s s s s s s s DataShee s Support of ATM traffic management via partial packet discard (PPD), forward explicit DataSheet4U.com congestion s Hot insertion capability notification (FECN), and the cell loss priority (CLP) ® s Compatible with Transwitch CellBus bit Programmable slew rate GTL+ I/O: — 1.7 Gbits/s cell bus operation — Programmable as bus arbiter Flexible per port cell counters Cell header translation and insertion with virtual path identifier (VPI) and virtual channel identifier (VCI) via external SRAM (u...