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ST7265x
LOW-POWER, FULL-SPEED USB 8-BIT MCU WITH 32K FLASH, 5K RAM, FLASH CARD I/F, TIMER, PWM, ADC, I2C, SPI
DATASHEET
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Memories – Up to 32K of ROM or High Density Flash (HDFlash) program memory with read/write protection – For HDFlash devices, In-Application Programming (IAP) via USB and In-Circuit programming (ICP) – Up to 5 Kbytes of RAM with up to 256 bytes stack s Clock, Reset and Supply Management – PLL for generating 48 MHz USB clock using a 12 MHz crystal – Low Voltage Reset (except on E suffix devices) – Dual supply management: analog voltage detector on the USB power line to enable smart power switching from USB power to battery (on E suffix devices). – Programmable Internal Voltage Regulator for Memory cards (2.8V to 3.5V) supplying: Flash Card I/O lines (voltage shifting) Up to 50 mA for Flash card supply – Clock-out capability s 47 programmable I/O lines – 15 high sink I/Os (8mA @0.6V /
[email protected]) – 5 true open drain outputs – 24 lines programmable as interrupt inputs s USB (Universal Serial Bus) Interface – with DMA for full speed bulk applications compliant with USB 12 Mbs specification (version 2.0 compliant) – On-Chip 3.3V USB voltage regulator and transceivers with software power-down – 5 USB endpoints: 1 control endpoint 2 IN endpoints supporting interrupt and bulk 2 OUT endpoints supporting interrupt and bulk – Hardware conversion between USB bulk packets and 512-byte blocks Device Summary
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TQFP64 10x10
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TQFP48
SO34 shrink
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Mass Storage Interface – DTC (Data Transfer Coprocessor): Universal Serial/Parallel communications interface, with software plug-ins for current and future protocol standards: Compact Flash - Multimedia Card Secure Digital Card - SmartMediaCard Sony Memory Stick - NAND Flash ATA Peripherals 2 Timers – Configurable Watchdog for system reliability – 16-bit Timer with 2 output compare functions. 2 Communication Interfaces – SPI synchronous serial interface – I2C Single Master Interface up to 400 KHz D/A and A/D Peripherals – PWM/BRM Generator (with 2 10-bit PWM/ BRM outputs) – 8-bit A/D Converter (ADC) with 8 channels Instruction Set – 8-bit data manipulation – 63 basic instructions – 17 main addressing modes – 8 x 8 unsigned multiply instruction – True bit manipulation Development Tools – Full hardware/software development package
Features Program memory User RAM (stack) - bytes Peripherals Operating Supply Package Operating Temperature June 2003
ST72651 32K ROM 5K (256)
ST72F651 32K FLASH
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ST72652 16K ROM 512 (256) USB, DTC, WDT Single 4.0V to 5.5V TQFP64 (10 x10) / TQFP48 (7x7) / SO34
USB, DTC, Timer, ADC, SPI, I C, PWM, WDT Dual 2.7V to 5.5V or Dual 3.0V to 5.5V or 4.0V to 5.5V (for USB) 4.0V to 5.5V (for USB) TQFP64 (10 x10) 0°C to +70°C
Rev. 2.3
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This is preliminary information on a new product. Details are subject to change without notice.
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Table of Contents
1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 REGISTER & MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8 4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.3 STRUCTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4 PROGRAM MEMORY READ-OUT PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.5 ICP (IN-CIRCUIT PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6 IAP (IN-APPLICATION PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.7 RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.8 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3 CPU REGISTERS . . . . . . . . . . ..