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M9S12XD256CAA Dataheets PDF



Part Number M9S12XD256CAA
Manufacturers Freescale Semiconductor
Logo Freescale Semiconductor
Description (M9S12XD Series) 16-Bit Microprocessor
Datasheet M9S12XD256CAA DatasheetM9S12XD256CAA Datasheet (PDF)

www.DataSheet4U.com Freescale Semiconductor Product Brief 9S12XDFAMPP Rev. 2.14, 7-Nov-2005 MC9S12XD Family 16-bit Microprocessor Family (covers MC9S12XD64 through MC9S12XDP512 and MC3S12XDT256/MC3S12XDG128) Introduction www.DataSheet4U.com Targeted at automotive multiplexing applications, the MC9S12XD Family will deliver 32-bit performance with all the advantages and efficiencies of a 16-bit MCU. The S12X is designed to retain the low cost, low power consumption, excellent EMC performance .

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www.DataSheet4U.com Freescale Semiconductor Product Brief 9S12XDFAMPP Rev. 2.14, 7-Nov-2005 MC9S12XD Family 16-bit Microprocessor Family (covers MC9S12XD64 through MC9S12XDP512 and MC3S12XDT256/MC3S12XDG128) Introduction www.DataSheet4U.com Targeted at automotive multiplexing applications, the MC9S12XD Family will deliver 32-bit performance with all the advantages and efficiencies of a 16-bit MCU. The S12X is designed to retain the low cost, low power consumption, excellent EMC performance and code-size efficiency advantages enjoyed by users of Freescale's previous 16-bit MC9S12 MCU family. Based around an enhanced S12 core, the MC9S12XD Family will deliver two to five times the performance of a 25 MHz S12 whilst retaining a high degree of pin and code compatibility with the original S12D - family. The MC9S12XD Family features the performance boosting XGATE co-processor. The XGATE, which is programmable in "C" language, has an instruction set which is optimized for data movement, logic and bit manipulation instructions. It runs at twice the bus frequency of the S12X and off-loads the CPU by providing high speed data transfer (and data processing) between any peripheral module, RAM and I/O ports. This is particularly useful in applications such as automotive gateways where there are multiple busses carrying heavy data traffic which would otherwise exert a heavy interrupt/processing load on the CPU. © Freescale Semiconductor, Inc., 2005. All rights reserved. DataSheet 4 U .com www.DataSheet4U www.DataSheet4U.com 4U.com www.DataSheet4U.com Features The MC9S12XD Family will feature an enhanced MSCAN module which, when used in conjunction with XGATE, delivers FullCAN performance with virtually unlimited number of mailboxes and retains backwards compatibility with the MSCAN module featured on previous S12 products. Memory options will range from 64 Kbytes to 512 Kbytes of Freescale's industry-leading, full automotive spec SG-Flash with additional integrated EEPROM. In addition to the rich S12 peripheral set, the MC9S12XD Family will feature more RAM, extra A/D channels, new timer features and additional LIN-compatible SCI ports compared with the original S12 DFamily. The MC9S12XD Family also features a new flexible interrupt handler which allows multilevel nested interrupts. The MC9S12XD Family has full 16-bit data paths throughout. The non-multiplexed expanded bus interface available on the 144-pin versions allows an easy interface to external memories. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. System power consumption is further improved with the new “fast exit from STOP mode” feature and an ultra low power wakeup timer. In addition to the I/O ports available in each module, up to 25 further I/O ports are available with interrupt capability allowing wakeup from STOP or WAIT mode. The MC9S12XD Family will be available in 144-pin LQFP (with optional external bus), 112-pin, and 80-pin options. Features www.DataSheet4U.com • • Upward compatible with MC9S12 instruction set Enhanced indexed addressing Additional (superset) instructions to improve 32-bit calculations and semaphore handling Access large data segments independent of PPAGE Eight levels of nested interrupt Flexible assignment of interrupt sources to each interrupt level. One non-maskable high priority interrupt (XIRQ) Wakeup interrupt inputs – IRQ and non-maskable XIRQ Features of the MC9S12XD Family are listed here. Please see Table 1 for memory options and Table 2 for the peripheral features that are available on the different family members. 16-bit CPU12X • • • Enhanced Interrupt Module • • • MC9S12XD Family, Rev. 2.14 2 Freescale Semiconductor DataSheet 4 U .com www.DataSheet4U www.DataSheet4U.com 4U.com www.DataSheet4U.com Features • • • XGATE • • • • • • • Programmable, high performance I/O co-processor module — up to 80 MIPS RISC performance Transfers data to or from all peripherals and RAM without CPU intervention or CPU wait states Performs logical, shifts, arithmetic, and bit operations on data Enables FullCAN capability when used in conjunction with MSCAN module Full LIN master or slave capability when used in conjunction with the six integrated LIN SCI modules Can interrupt the HCS12X CPU signalling transfer completion Triggers from any hardware module as well as from the CPU possible 64K, 128K, 256K, 384K and 512K byte Flash 128K and 256K ROM Flash General Features – Erase sector size 1024 bytes – Automated program and erase algorithm – Fast sector erase and word program operation – 2-stage command pipeline for faster multi-word program times – Sector erase abort feature for critical interrupt response – Protection scheme to prevent accidental program or erase – Security option to prevent unauthorized access – Code integrity check using built-in data compression – Sense-amp margin level setting for reads 1K, 2K, 4K byte EEPROM – Small erase.


IS221 M9S12XD256CAA M9S12XD


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