CD74HC138C
Data sheet acquired from Harris Semiconductor SCHS147A
CD74HC138, CD74HCT138, CD74HC238, CD74HCT238
High Speed CMOS Log...
Description
Data sheet acquired from Harris Semiconductor SCHS147A
CD74HC138, CD74HCT138, CD74HC238, CD74HCT238
High Speed CMOS Logic 3-to-8 Line Decoder/ Demultiplexer Inverting and Non-Inverting
October 1997 - Revised February 1999
Features
Select One Of Eight Data Outputs Active Low for 138, Active High for 238
[ /Title l/O Port or Memory Selector (CD74 Three Enable Inputs to Simplify Cascading HC138 Typical Propagation Delay of 13ns at VCC = 5V, , CL = 15pF, TA = 25oC www.DataSheet4U.com CD74 Fanout (Over Temperature Range) HCT13 - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads 8, - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads CD74 Wide Operating Temperature Range . . . -55oC to 125oC HC238 , Balanced Propagation Delay and Transition Times CD74 Significant Power Reduction Compared to LSTTL HCT23 Logic ICs 8) HC Types /Sub- 2V to 6V Operation ject - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V (High Speed HCT Types
- 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Pinout
CD74HC138, CD74HCT138, CD74HC238, CD74HCT238 (PDIP, SOIC) TOP VIEW
A0 1 A1 2 A2 3 E1 4 E2 5 E3 6 (Y7) Y7 7 GND 8 16 VCC 15 Y0 (Y0) 14 Y1 (Y1) 13 Y2 (Y2) 12 Y3 (Y3) 11 Y4 (Y4) 10 Y5 (Y5) 9 Y6 (Y6)
Signal names in parentheses are for ’HC238 and ’HCT238.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handli...
Similar Datasheet