SDA5523

DATA SHEET MICRONAS SDA 55xx TVText Pro Edition Sept. 10, 2004 6251-556-3DS MICRONAS SDA 55xx Contents Page 8 8 8 8 9 9 9 9 11 12 12 12 12 13 13 14 14 14 15 15 15 15 15 15 16 16 16 16 16 16 16 16 16 18 18 18 19 19 20 20 20 20 20 20 20 21 Section 1. 1.1. 1.1.1. 1.1.2. 1.1.3. 1.1.4. 1.1.5. 1.1.6. 1.2. 2. 2.1. 2.1.1. 2.1.2. 2.1.3. 2.1.4. 2.2. 2.2.1. 2.2.2. 2.2.2.1. 2.2.2.1.1. 2.2.2.1.2. 2.2.2.1.3. 2.2.2.2. 2.2.3. 2.2.4. 2.2.4.1. 2.2.4.1.1. 2.2.4.1.2. 2.2.4.1.3. 2.2.4.1.4. 2.2.4.1.5. 2.2.4.2. 2.2.4.3. 2.2.5. 2.2.5.1. 2.2.5.1.1. 2.2.5.1.2. 2.2.6. 2.2.7. 2.2.8. 2.2.8.1. 2.2.8.1.1. 2.2.8.1.2. 2.2.8.1.3. 2.2.8.1.4. 2.2.8.1.5. Title Introduction General Features External Crystal and Programmable Clock Speed Microcontroller Features Memory Display Features Acquisition Features Ports Overview of Current Versions and Packages for SDA 55xx Functional Description Clock System General Function System Clock Pixel Clock Related Registers Slicer and Data Acquisition General Function Slicer Architecture Distortion Processing Noise Frequency Attenuation Group Delay Data Separation H/V-Synchronization Acquisition Interface Framing Code Check Framing Code FC1 Framing Code FCVPS Framing Code FC3 Framing Code FCWSS FC Check Select Interrupts VBI Buffer and Memory Organization Related Registers RAM Registers Field Parameters Line Parameters Recommended Parameter Settings Microcontroller Architecture CPU Hardware Instruction Decoder Program Control Section Internal Data RAM Arithmetic/Logic Unit ...