MB84VD23381EJ

( DataSheet : www.DataSheet4U.com ) FUJITSU SEMICONDUCTOR DATA SHEET DS05-50209-4E Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM CMOS 64 M ( × 16) FLASH MEMORY & 16 M ( × 16) SRAM Interface FCRAM MB84VD23381EJ-85/90 s FEATURES Power Supply Voltage of 2.7 V to 3.1 V for FCRAM Power Supply Voltage of 2.7 V to 3.3 V for Flash High Performance 85 ns maximum access time (Flash) 85 ns maximum access time (FCRAM) Operating Temperature −30 °C to +85 °C Package 101-ball FBGA (Continued) s PRODUCT LINE-UP Flash Memory Power Supply Voltage ( V ) Max Address Access Time (ns) Max CE Access Time (ns) Max OE Access Time (ns) VCCf* = 2.7 V to 3.3 V 85 85 35 FCRAM VCCs* = 2.7 V to 3.1 V 85 85 50 *: Both VCCf and VCCs must be the same level when either part is being accessed. s PACKAGE 101-ball plastic FBGA (BGA-101P-M01) MB84VD23381EJ-90 guarantees both FCRAM and Flash at 85 ns Access Cycle. www.DataSheet4U.com www.DataSheet4U.com MB84VD23381EJ-85/90 (Continued) FLASH MEMORY Simultaneous Read/Write Operations (Flex bank) Two virtual Banks are chosen from the combination of four physical banks. Host system can program or erase in one bank, then immediately and simultaneously read from the other bank. Zero latency between read and write operations. Read-while-erase Read-while-program Minimum 100,000 Write/Erase Cycles Sector Erase Architecture Sixteen 4 Kwords and one hundred twenty-six 32 Kword sectors. Any combination of sectors can be concurrently erased...