4-Bit Magnitude Comparators
54LS85 DM54LS85 DM74LS85 4-Bit Magnitude Comparators
June 1989
54LS85 DM54LS85 DM74LS85 4-Bit Magnitude Comparators
Ge...
Description
54LS85 DM54LS85 DM74LS85 4-Bit Magnitude Comparators
June 1989
54LS85 DM54LS85 DM74LS85 4-Bit Magnitude Comparators
General Description
These 4-bit magnitude comparators perform comparison of straight binary or BCD codes Three fully-decoded decisions about two 4-bit words (A B) are made and are externally available at three outputs These devices are fully expandable to any number of bits without external gates Words of greater length may be compared by connecting comparators in cascade The A l B A k B and A e B outputs of a stage handling less-significant bits are connected to the corresponding inputs of the next stage handling more-significant bits The stage handling the least-significant bits must have a high-level voltage applied to the A e B input The cascading path is implemented with only a two-gate-level delay to reduce overall comparison times for long words
Features
Y Y Y
Typical power dissipation 52 mW Typical delay (4-bit words) 24 ns Alternate Military Aerospace device (54LS85) is available Contact a National Semiconductor Sales Office Distributor for specifications
Connection Diagram
Dual-In-Line Package
Order Number 54LS85DMQB 54LS85FMQB 54LS85LMQB DM54LS85J DM54LS85W DM74LS85M or DM74LS85N See NS Package Number E20A J16A M16A N16E or W16A
TL F 6379 – 1
Function Table
Comparing Inputs A3 B3 A3 l B3 A3 k B3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3
e e e e e e e e e e e e
Cascading Inputs A0 B0 X X X X X X A0 l B0 A0 k B0 A0 e B0 A0 e B0 A0 e B0 A0 e B0 A0 e B...
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