MC74HC126A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 3-State Noninverting Buffers High–Performance Silicon–Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. The devices have four separate output enables that are active–low (HC125A) or active–high (HC126A). Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates LOGIC DIAGRAM HC125A Active–Low Output Enables 2 1 5 4 6 3 MC74HC125A MC74HC126A N SUFFIX 14–LEAD PLASTIC DIP PACKAGE CASE 646–06 HC126A Active–High Output Enables 2 1 5 4 3 A1 OE1 Y1 A1 OE1 A2 OE2 Y2 A2 OE2 A3 OE3 9 10 12 13 8 Y3 A4 OE4 w Inputs A H L X OE L L H 11 w Y H L Z .D w A3 OE3 A4 OE4 Inputs A H L X OE H H L t a 9 10 12 13 S a 6 8 11 e h Y1 Y2 Y3 t e U 4 D SUFFIX 14–LEAD PLASTIC SOIC PACKAGE CASE 751A–03 .c m o DT SUFFIX 14–LEAD PLASTIC TSSOP PACKAGE CASE 948G–01 ORDERING INFORMATION MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT Plastic SOIC TSSOP PIN ASSIGNMENT OE1...