DatasheetsPDF.com

MB81F641642C Dataheets PDF



Part Number MB81F641642C
Manufacturers Fujitsu
Logo Fujitsu
Description 4 x 1 M x 16 BIT SYNCHRONOUS DYNAMIC RAM
Datasheet MB81F641642C DatasheetMB81F641642C Datasheet (PDF)

To Top / Lineup / Index FUJITSU SEMICONDUCTOR DATA SHEET DS05-11045-1E MEMORY CMOS 4 × 1 M × 16 BIT SYNCHRONOUS DYNAMIC RAM MB81F641642C-102/-103/-102L/-103L CMOS 4-Bank × 1,048,576-Word × 16 Bit Synchronous Dynamic Random Access Memory s DESCRIPTION The Fujitsu MB81F641642C is a CMOS Synchronous Dynamic Random Access Memory (SDRAM) containing 67,108,864 memory cells accessible in a 16-bit format. The MB81F641642C features a fully synchronous operation referenced to a positive edge clock wher.

  MB81F641642C   MB81F641642C



Document
To Top / Lineup / Index FUJITSU SEMICONDUCTOR DATA SHEET DS05-11045-1E MEMORY CMOS 4 × 1 M × 16 BIT SYNCHRONOUS DYNAMIC RAM MB81F641642C-102/-103/-102L/-103L CMOS 4-Bank × 1,048,576-Word × 16 Bit Synchronous Dynamic Random Access Memory s DESCRIPTION The Fujitsu MB81F641642C is a CMOS Synchronous Dynamic Random Access Memory (SDRAM) containing 67,108,864 memory cells accessible in a 16-bit format. The MB81F641642C features a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81F641642C SDRAM is designed to reduce the complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing constraints, and may improve data bandwidth of memory as much as 5 times more than a standard DRAM. The MB81F641642C is ideally suited for workstations, personal computers, laser printers, high resolution graphic adapters/accelerators and other applications where an extremely large memory and bandwidth are required and where a simple interface is needed. s PRODUCT LINE & FEATURES Parameter CL - tRCD - tRP Clock Frequency Burst Mode Cycle Time Access Time From Clock (CL = 3) Operating Current (2 banks active) Power Down Mode Current (ICC2P) Self Refresh Current (ICC6) MB81F641642C -102 -102L -103 -103L 2 - 2 - 2 clk min. 100 MHz max. 10 ns min. 6 ns max. 105 mA max. 2 mA max. 1 mA max. 1 mA max. 500 µA max. 3 - 2 - 2 clk min. 100 MHz max. 10 ns min. 6 ns max. 105 mA max. 2 mA max. 1 mA max. 1 mA max. 500 µA max. • • • • • Single +3.3 V Supply ±0.3 V tolerance LVTTL compatible I/O 4 K refresh cycles every 65.6 ms Four bank operation Burst read/write operation and burst read/single write operation capability • Standard and low power versions • Programmable burst type, burst length, and CAS latency • Auto-and Self-refresh (every 16 µs) • CKE power down mode • Output Enable and Input Data Mask To Top / Lineup / Index MB81F641642C-102/-103/-102L/-103L s PACKAGE Plastic TSOP(II) Package Marking side (FPT-54P-M02) (Normal Bend) Package and Ordering Information – 54-pin plastic (400 mil) TSOP-II, order as MB81F641642C-×××FN (Std power), MB81F641642C-×××LFN (Low power), MB81F641642C-×××EFN (Extra power) 2 To Top / Lineup / Index MB81F641642C-102/-103/-102L/-103L s PIN ASSIGNMENTS AND DESCRIPTIONS 54-Pin TSOP(II) (TOP VIEW) VCC DQ0 VCCQ DQ1 DQ2 VSSQ DQ3 DQ4 VCCQ DQ5 DQ6 VSSQ DQ7 VCC DQML WE CAS RAS CS A13 A12 A10/AP A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 VSS DQ15 VSSQ DQ14 DQ13 VCCQ DQ12 DQ11 VSSQ DQ10 DQ9 VCCQ DQ8 VSS N.C. DQMU CLK CKE N.C. A11 A9 A8 A7 A6 A5 A4 VSS (Marking side) Pin Number 1, 3, 9, 14, 27, 43, 49 2, 4, 5, 7, 8, 10, 11, 13, 42, 44, 45, 47, 48, 50, 51, 53 6, 12, 28, 41, 46, 52, 54 36, 40 16 17 18 19 20, 21 22 22, 23, 24, .


MB81F641642D MB81F641642C MB81F641642C-103FN


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)