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X29LV320MBTC Dataheets PDF



Part Number X29LV320MBTC
Manufacturers Macronix International
Logo Macronix International
Description MX29LV320MBTC
Datasheet X29LV320MBTC DatasheetX29LV320MBTC Datasheet (PDF)

MX29LV320T/B 32M-BIT [4M x 8 / 2M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY FEATURES GENERAL FEATURES • 4,194,304 x 8 / 2,097,152 x 16 switchable • Sector Structure - 8K-Byte x 8 and 64K-Byte x 63 • Extra 64K-Byte sector for security - Features factory locked and identifiable, and cuswww.DataSheet4U.com tomer lockable • Twenty-Four Sector Groups - Provides sector group protect function to prevent program or erase operation in the protected sector group - Provides chip unprotect function to allow.

  X29LV320MBTC   X29LV320MBTC


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MX29LV320T/B 32M-BIT [4M x 8 / 2M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY FEATURES GENERAL FEATURES • 4,194,304 x 8 / 2,097,152 x 16 switchable • Sector Structure - 8K-Byte x 8 and 64K-Byte x 63 • Extra 64K-Byte sector for security - Features factory locked and identifiable, and cuswww.DataSheet4U.com tomer lockable • Twenty-Four Sector Groups - Provides sector group protect function to prevent program or erase operation in the protected sector group - Provides chip unprotect function to allow code changing - Provides temporary sector group unprotect function for code changing in previously protected sector groups • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations • Latch-up protected to 250mA from -1V to Vcc + 1V • Low Vcc write inhibit is equal to or less than 1.4V • Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash PERFORMANCE • High Performance - Fast access time: 70/90/120ns - Fast program time: 7us/word typical utilizing accelerate function - Fast erase time: 1.6s/sector, 112s/chip (typical) • Low Power Consumption - Low active read current: 10mA (typical) at 5MHz - Low standby current: 200nA (typical) • Minimum 100,000 erase/program cycle • 10-year data retention SOFTWARE FEATURES • Erase Suspend/ Erase Resume - Suspends sector erase operation to read data from or program data to another sector which is not being erased • Status Reply - Data polling & Toggle bits provide detection of program and erase operation completion • Support Common Flash Interface (CFI) HARDWARE FEATURES • Ready/Busy (RY/BY) Output - Provides a hardware method of detecting program and erase operation completion • Hardware Reset (RESET) Input - Provides a hardware method to reset the internal state machine to read mode • WP/ACC input pin - Provides accelerated program capability PACKAGE • 48-Pin TSOP • 48-Ball CSP GENERAL DESCRIPTION The MX29LV320T/B is a 32-mega bit Flash memory organized as 4M bytes of 8 bits and 2M words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV320T/B is packaged in 48-pin TSOP and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV320T/B offers access time as fast as 70ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV320T/B has separate chip enable (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV320T/B uses a command register to manage this functionality. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and program mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. P/N:PM0742 REV. 1.4, JUL. 04, 2003 1 MX29LV320T/B The MX29LV320T/B uses a 2.7V to 3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamperes on address and data pin from -1V to VCC + 1V. www.DataSheet4U.com modes allow sectors of the array to be erased in one erase cycle. The Automatic Sector Erase algorithm automatically programs the specified sector(s) prior to electrical erase. The timing and verification of electrical erase are controlled internally within the device. AUTOMATIC ERASE ALGORITHM MXIC's Automatic Erase algorithm requires the user to write commands to the command register using standard microprocessor write timings. The device will automatically pre-program and verify the entire array. Then the device automatically times the erase pulse width, provides the erase verification, and counts the number of sequences. A status bit toggling between consecutive read cycles provides feedback to the user as to the status of the programming operation. Register contents serve as inputs to an internal statemachine which controls the erase and programming circuitry. During write cycles, the command register internally latches address and data needed for the programming and erase operations. During a system write cycle, addresses are latched on the falling edge, and data are latched on the rising edge of WE . MXIC's Flash technology combines years of EPROM experience to produce the highest levels of quality, reliability, and cost effectiveness. The MX29LV320T/B electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes/words are programmed by using the EPROM programming mechanism of hot electron injection. During a program cycle, the state-machine will control the program sequences and command register.


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