CD1865

CD1865 Intelligent Eight-Channel Communications Controller Datasheet Product Features s Eight full-duplex asynchronous channels supporting data rates up to 115.2 kbps Note: To support this data rate, the specified system clock frequency is required. Register-based interrupt acknowledges eliminate need for separate interrupt acknowledge signals Automatic prioritizing scheme allows device to respond to an interrupt acknowledge with the highest internal interrupt pending (host-programmable) Sophisticated interrupt schemes — Vectored interrupts — Fair Share interrupts — Good Data interrupts for improved throughput — Simultaneous interrupt requests for three classes of interrupts: Rx, Tx, and modem state changes Independent baud-rate generators for each channel/direction s s s s s s s s s s s s s s w w w .D t a S a e h Software compatibility with the CD180 and CD1864 devices Generation and detection of special characters Automatic flow control — In-band (Xon, Xoff generation, and detection) — Out-of-band (DTR/DSR or RTS/CTS) On-chip FIFO — 8 bytes each for Rx, Tx, and Status Line break detection and generation Multiple-chip daisy-chain cascading feature Odd, even, forced, or no parity modem/general-purpose I/O signals per channel System clock up to 66 MHz (x2), 33MHz (x1) CMOS technology in 100-pin MQFP t e U 4 .c m o As of May 18, 2001, this document replaces the Basis Communications Corp. document CL-CD1865 — Intelligent 8-Channel Communications Controller...