NL37WZ17
4 Triple Noninverting t Schmitt−Trigger Buffer ee
The NL37WZ17 is a high performance buffer with Schmitt−Trigg...
NL37WZ17
4 Triple Noninverting t Schmitt−Trigger Buffer ee
The NL37WZ17 is a high performance buffer with Schmitt−Trigger inputs operating from a 1.65 to 5.5 V supply. The NL37WZ17 can be used as a line receiver which will receive slow input signals. The NL37WZ17 is capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, it has a greater noise margin than conventional inverters. The NL37WZ17 has hysteresis between the positive−going and the negative−going input thresholds (typically 1.0 V) which is determined internally by
transistor ratios and is essentially insensitive to temperature and supply voltage variations.
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http://onsemi.com MARKING DIAGRAM
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8 1 US8 US SUFFIX CASE 493
Features
Designed for 1.65 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs and Outputs LVTTL Compatible − Interface Capability with 5 V TTL Logic
with VCC = 3 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements Current Drive Capability is 24 mA at the Outputs Chip Complexity: FET = 94 Pb−Free Package is Available
IN A1
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VCC
OUT Y3
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IN A2
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GND
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OUT Y1
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IN A1
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LX M G G
LX = Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary dep...
