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CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3 V 8 K / 16 K × 8 Asynchronous Dual-Port Static RAM
CY7C144AV CY7C006AV
3.3 V 8 K / 16 K × 8 Asynchronous Dual-Port Static RAM
3.3 V 8 K / 16 K × 8 Dual-Port Static RAM
Features
■ True dual-ported memory cells which allow simultaneous access of the same memory location
■ 8 K / 16 K × 8 organizations (CY7C144AV/CY7C006AV) ■ 0.35-micron complementary metal oxide semiconductor
(CMOS) for optimum speed/power ■ High-speed access: 25 ns ■ Low operating power
❐ Active: ICC = 115 mA (typical) ❐ Standby: ISB3 = 10 A (typical) ■ Fully asynchronous operation ■ Automatic power-down
Logic Block Diagram
R/WL
CEL
OEL
■ Expandable data bus to 16 bits or more using Master/ Slave chip select when using more than one device
■ On-chip arbitration logic ■ Semaphores included to permit software handshaking
between ports ■ INT flag for port-to-port communication ■ Pin select for Master or .