Document
STP5NC50 - STP5NC50FP STB5NC50 - STB5NC50-1
N-CHANNEL 500V - 1.3Ω - 5.5A TO-220/FP/D2PAK/I2PAK PowerMesh™ II MOSFET
TYPE STP5NC50 STP5NC50FP STB5NC50 STB5NC50-1
s s s s s
VDSS 500 500 500 500 V V V V
RDS(on) < 1.5Ω < 1.5Ω < 1.5Ω < 1.5Ω
ID 5.5A 5.5A 5.5A 5.5A
3 1
TYPICAL RDS(on) = 1.3Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
TO-220
D2PAK
TO-220FP
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DESCRIPTION The PowerMESH™ II is the evolution of the first generation of MESH OVERLAY™ . The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVES ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
I2PAK
INTERNAL SCHEMATIC DIAGRAM
Value STP5NC50 STB5NC50/-1 STP5NC50FP
Unit
VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt(1) VISO Tj Tstg
Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature 5.5 3.5 22 100 0.8
500 500 ±30 5.5(*) 3.5(*) 22 35 0.28 3.5 2500 -55 to 175 -65 to 175
(*)Limited only by maximum temperature allowed
V V V A A A W W/°C V/ns V °C °C
(•)Pulse width limited by safe operating area (1)ISD ≤5.5A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.
December 2002
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STP5NC50 - STP5NC50FP - STB5NC50 - STB5NC50-1
THERMAL DATA
TO-220 D 2PAK I2 PAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.25 62.5 300 TO-220FP 3.57 ° C/W ° C/W °C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 5.5 280 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Condition s ID = 250µA, VGS = 0 V DS = Max Rating V DS = Max Rating, TC = 125 ° C V GS = ± 30V Min. 500 1 50 ±100 Typ. Max. Unit V µA µA nA
ON (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Condition s V DS = VGS, ID = 250µA V GS = 10V, ID = 2 A Min. 2 Typ. 3 1.3 Max. 4 1.5 Unit V Ω
DYNAMIC
Symbol g fs (1) C iss C oss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Condition s V DS > ID(on) x RDS(on)max, ID = 2.5A V DS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 4 480 80 11.5 Max. Unit S pF pF pF
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STP5NC50 - STP5NC50FP - STB5NC50 - STB5NC50-1
ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Condition s V DD = 250V, ID = 2.5A R G = 4.7Ω V GS = 10V (see test circuit, Figure 3) V DD = 400V, ID = 5.5A, V GS = 10V Min. Typ. 14 15 17.5 3 9 24.5 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Condit ions VDD = 400V, ID = 5.5A, R G = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Min. Typ. 12 14 20 Max. Unit ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) V SD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 5.5A, VGS = 0 ISD = 5.5A, di/dt = 100A/µs, V DD = 100V, Tj = 150°C (see test circuit, Figure 5) 360 1.6 9 Test Condition s Min. Typ. Max. 5.5 22 1.6 Unit A A V ns µC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area for TO-220/D2PAK/I2PAK
Safe Operating Area for TO-220FP
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Thermal Impedence for TO-220/D2PAK/I2PAK Thermal Impedence for TO-220FP
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
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Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized Gate Threshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STP5NC50 - STP5NC50FP - STB5NC50 - STB5NC50-1
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And.