m Preliminary PLL601-12 o c . Output PLL Clock with Selectable Odd Multiplier Dual U t4 FEATURES e PIN CONFIGURATION e (Top View) h Selectable multipliers (x2.5, x2.75, x3, x4.25, x5, x5.5, x5.75, S x6, x6.25, x10, x11, x11.5, x12, a x12.5). t Crystala range from 13MHz to 31MHz (see SelecD tion Table for detailed acceptable input ranges). . w Maximum o...
