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PLL650-04

Part Number	PLL650-04
Manufacturer	PhaseLink
Description	Low EMI Clock
Published	Feb 10, 2006
Detailed Description	m Preliminary PLL650-04 o c . EMI Clock for 10/100 PHY and Gigabit Ethernet Low U t4 e FEATURES PIN CONFIGURATION e hswi...
Datasheet	PLL650-04 PDF File

Overview

m Preliminary PLL650-04 o c .
EMI Clock for 10/100 PHY and Gigabit Ethernet Low U t4 e FEATURES PIN CONFIGURATION e hswing with 25-mA output drive • Full CMOS output S capability at TTL level.
a t • Advanced, low power, sub-micron CMOS processes.
a • 25 MHz .
D fundamental crystal or clock input.
• Low jitter (< 80ps cycle-to-cycle) w • 25 MHz and 50 MHz outputs w CLKOUT selectable between 90, 100, 125, 133, w• Five 145 and 150 MHz.
XIN 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 VDD XOUT/SSTE*^ GND 50M_EN^ 25MHz/25M_EN*^ GND PLL 650-04 VDD • • • • • • SSTE (SST Enable) Low EMI selector for CLKOUT.
Output enable functionality.
Zero PPM synthesis error in all clocks.
Ideal for Network sw...

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