AL240

w w a D . w S a t e e h U 4 t m o .c U 4 AL240 Video Decoder t e Data Sheets e h S a t a .D w w w Version 1.0 ©2004 by AverLogic Technologies, Corp. .c m o w w w .D a S a t e e h U 4 t m o .c AL240 Amendments 11.01.04 11.10.04 11.17.04 11.18.04 12.27.04 Preliminary version 0.1 Change input video port selection: Y0/C0 = AI1/AI2; Y1/C1 = AI0/AI3 Fix crystal input/output (XIN/XOUT) frequency range at 20MHz. Delete register 01h definition; change to “Reserse” Update to Version 0.3 Change to Lead Free (PBF) package Revised “Function Description” contents. Add “Software Reset”/”Phase Lock Loop” descriptions. Add Sec10.3 “reference setting value” in register description. Add “Electrical Characteristics” Revised registers description of register# BDh~BFh/D0h Update to Version 0.4 Change input video port selection: Y0/C0 = AI0/AI2; Y1/C1 = AI1/AI3 Add Reg#03h “adaptive_mode” to software programming table of input video selection. Add registers to section 10.1 “Register Set” Remove “color bar” function. Revised “AGC control” content. Revised “Input Format” content. Add channel switch programming suggestions. Change register BAh name to “ PLLCTRL2” Add “ Feh = FF” in section 10.3 “Reference setting value” for all modes; change register 02h value to “4Eh” for all modes. Remove 22-bit RGB output support Add 22-bit YCbCr output support Rearrange VBI registers number Change Reg#65<5:4> to reserve Add output timing diagrams Add AC characteristics for output...