IZ4406

w h S 104 x 1 bit organisation a areas with special characteristics t Three memory a PROM, EEPROM) (eg ROM, D Maximum . of 20480 count units w Special security features Minimum of 10 write/erase cycles w Data retention for minimum of ten years Features 4 t e e TECHNICAL DATA m o c . Intelligent 104-Bit EEPROM Counter 4U for > 20000 Units with Security Logic Contact configuration and serial interface in accordance to ISO standard 7816-3 (synchronous transmission) Pin Definitions and Functions Card Contact C7 Symbol I/O Bidirectional data line (open drain) Code entry on “Input” only for transport C3 CLC Clock input C2 RST Control input (reset) C1 VCC Supply voltage C6 N.C. Not connected C5 GND Ground IZ4406 comes as an M1 wire-bonded module for embedding in plastic cards and as a die for customer packaging General Description The chip contains an EEPROM/PROM of 88 bits, a mask ROM of 16 bits and a sequencing control with security logic (cf block diagram, Fig. 1). Memory (104 bits) is divided into the following functional areas I ROM This area contains unalterable chip data (eg application, design status). Part of the data is entered by way of a ROM mask and the remainder when testing. Both parts are unalterable. In this area the user can enter card data for a particular application. A control flag can be set to safeguard this area against alteration. This area contains the count data and stores the current count in nonvolatile memory. The individual counte...