MC54HC154

MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1-of-16 Decoder/Demultiplexer High–Performance Silicon–Gate CMOS The MC54/74HC154 is identical in pinout to the LS154. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device, when enabled, selects one of 16 active–low outputs. Two active–low Chip Selects are provided to facilitate the chip–select, demultiplexing, and cascading functions. When either Chip Select is high, all outputs are high. The demultiplexing function is accomplished by using the Address inputs to select the desired device output. Then, while holding one chip select input low, data can be applied to the other chip select input (see Application Note). The HC154 is primarily used for memory address decoding and data routing applications. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 192 FETs or 48 Equivalent Gates MC54/74HC154 24 1 J SUFFIX CERAMIC PACKAGE CASE 758–02 24 1 N SUFFIX PLASTIC PACKAGE CASE 724–03 24 1 DW SUFFIX SOIC PACKAGE CASE 751E–04 ORDERING INFORMATION MC54HCXXXJ MC74HCXXXN MC74HCXXXDW Ceramic Plastic SOIC LOGIC DIAGRAM 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17 PIN ASSIGNMENT Y0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y1...