Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Presettable Counters
MC54/74HCT161A MC54/74HCT163A
High–Performance Silicon–Gate CMOS
The MC54/74HCT161A and HCT163A are identical in pinout to the LS161A and LS163A. These devices may be used as level converters for interfacing TTL or NMOS outputs to high speed CMOS inputs. The HCT161A and HCT163A are programmable 4–bit binary counters with asynchronous and synchronous reset, respectively.
16 1
J SUFFIX CERAMIC PACKAGE CASE 620–10
• • • • • • •
Output Drive Capability: 10 LSTTL Loads TTL, NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices
16 1 16 1
N SUFFIX PLASTIC PACKAGE CASE 648–08
In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 200 FETs or 50 Equivalent Gates LOGIC DIAGRAM
D SUFFIX SOIC PACKAGE CASE 751B–05
ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXAD 14 13 12 11 Q0 Q1 Q2 Q3 Ripple Carry Out BCD or Binary Outputs Device HCT161A HCT163A Count Mode Binary Binary Reset Mode Asynchronous Synchronous Ceramic Plastic SOIC
P0 Preset Data Inputs P1 P2 P3 Clock
3 4 5 6
2
15
Pinout: 16–Lead Package (Top View)
VCC RCO* 16 15 Q0 14 Q1 13 Q2 12 Q3 11 Enable T Load 10 9
Reset Load Count Enables Enable P Enable T
1 9 7 10 Pin 16 = VCC Pin 8 = GND
FUNCTION TABLE
Inputs Clock Reset* L H H H H Load X L H H H Enable P X X H L X Enable T X X H X L Output Q Reset Load Preset Data Count No Count No Count 1 2 3 P0 4 P1 5 P2 6 P3 7 8 Enable GND P
Reset Clock
* RCO = Ripple Carry Out
H = High Level; L = Low Level; X = Don’t Care * = HCT163A only. HCT161A is an “Asynchronous–Reset” device.
10/95
© Motorola, Inc. 1995
1
REV 2
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ
MC54/74HCT161A MC54/74HCT163A
MAXIMUM RATINGS*
Symbol VCC Vin Parameter Value Unit V V V Positive DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) – 0.5 to + 7.0 – 1.5 to VCC + 1.5 – 0.5 to VCC + 0.5 ± 20 ± 25 ± 50 750 500 Vout Iin DC Output Voltage (Referenced to GND) DC Input Current, per Pin mA mA mA Iout DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic or Ceramic DIP† SOIC Package† Storage Temperature Range mW Tstg TL – 65 to + 150 260 300
_C _C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
v
v
Lead Temperature, 1 mm from Case for 10 Seconds Plastic DIP or SOIC Package Ceramic DIP
ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Parameter Min 4.5 0 Max 5.5 Unit V V DC Supply Voltage (Referenced to GND) Vin, Vout TA DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC – 55 0 + 125 500
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. †Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C Ceramic DIP: – 10 mW/_C from 100_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
_C
ns
tr, tf
DC ELECTRICAL CHARACTERISTICS (Voltages referenced to GND)
VCC Symbol VIH VIL VOH Parameter Minimum High–Level Input Voltage Maximum Low–Level Input Voltage Minimum High–Level Output Voltage Test Conditions Vout = 0.1 V or VCC = –1.0V |Iout| 20 µA V 4.5 5.5 4.5 5.5 4.5 5.5 4.5 4.5 5.5 4.5 5.5 5.5
Guaranteed Limit – 55 to 25_C 2.0 2.0 0.80 0.80 4.4 5.4 3.98 0.10 0.10 0.26 ± 0.10 4 ≤ 85°C 2.0 2.0 0.80 0.80 4.4 5.4 3.84 0.10 0.10 0.33 ± 1.00 40 ≤ 125°C 2.0 2.0 0.80 0.80 4.4 5.4 3.70 0.10 0.10 0.40 ± 1.00 160 Unit V V V
v v
Vout = 0.1 V |Iout| 20 µA Vin = VIH or VIL .