ICS2595

Integrated Circuit Systems, Inc. ICS2595 Not recommended for new designs User-Programmable Dual High-Performance Clock Generator Description The ICS2595 is a dual-PLL (phase-locked loop) clock generator specifically designed for high-resolution, highrefresh rate, video applications. The video PLL generates any of 16 pre-programmed frequencies through selection of the address lines FS0-FS3. Similarly, the auxiliary PLL can generate any one of four pre-programmed frequencies via the MS0 & MS1 lines. A unique feature of the ICS2595 is the ability to redefine frequency selections in both the VCLK and MCLK synthesizers after power-up. This permits complete set-up of the frequency table upon system initialization. Features Advanced ICS monolithic phase-locked loop technology for extremely low jitter Supports high-resolution graphics - VCLK output to 145 MHz Completely integrated - requires only external crystal (or reference frequency and decoupling) Power-down modes support portable computing Sixteen selectable VCLK frequencies (all user re-programmable) Four selectable MCLK frequencies (all user re-programmable) Applications PC Graphics VGA/Supper VGA/XGA Applications Block Diagram Pin Configuration 20-Pin DIP or SOIC ICS2595 RevB 3/2/00 ICS2595 Pin Descriptions PIN NUMBER 1 2 3 4 5 6 7 8 9 10,14,16 11 12 13,20 15 17 18 19 PIN NAME X1 X2 EXTFREQ FS0 FS1 STROBE FS2 FS3 MS0 GND MS1 MCLK VDD VAA RESERVED REFCLK VCLK TYPE IN OUT IN IN IN IN IN IN IN PWR IN O...