AT572D740

Features Dual Core System Integrating an ARM7TDMI ARM Thumb Processor Core and a mAgic DSP for Audio, Communication and Beam-forming Applications High Performance DSP Operating at 100 MHz – 1 GFLOPS - 1.5 Gops – 10 Arithmetic Operations per Cycle (4 Multiply, 2 Add/subtract, 1 Add, 1 Subtract Floating and Fixed Point) Allowing Single Cycle FFT Butterfly – Native Support for Complex Arithmetic and Vectorial SIMD Operations: One Complex Multiply with Dual Add/sub per Clock Cycle or Two Real Multiply and Two Add/sub or Simple Scalar Operations – 32-bit Integer and IEEE 40-bit Extended Precision Floating Point Numeric Format – Large Multi-port Data Register File: 512 Registers Organized in Two 4-input 4output 256-register Banks – Orthogonal VLIW Architecture, Code Compression for Code Size Reduction – Flexible Addressing Capability: 2 Independent Address Generation Units Operating on a 16 Registers Address Register File Supporting Programmable Stride, Circular Pointers and Bit Reversal – 1.7 Mbits of On-chip SRAM: 17 K x 40-bit Data Memory Locations 8 K x 128-bit Program Memory Location, Equivalent to 24K Instructions – DMA Access to the External Program and Data Memory – Two Main Operating Modes: Run and System Mode – Efficient Optimizing Assembler: Allows Easy Exploitation of the Available Hardware Resources Parallelism Utilizes the ARM7TDMI Processor Core with 32 K Byte of Integrated SRAM, Operating at 50 MHz – Fully-programmable External Bus Interface (EBI) Maximum E...