Automotive SDR SDRAM
256Mb: x4, x8, x16 Automotive SDRAM Features
Automotive SDR SDRAM
MT48LC64M4A2 – 16 Meg x 4 x 4 banks MT48LC32M8A2 – 8 ...
Description
256Mb: x4, x8, x16 Automotive SDRAM Features
Automotive SDR SDRAM
MT48LC64M4A2 – 16 Meg x 4 x 4 banks MT48LC32M8A2 – 8 Meg x 8 x 4 banks MT48LC16M16A2 – 4 Meg x 16 x 4 banks
Features
PC100- and PC133-compliant Fully synchronous; all signals registered on positive
edge of system clock Internal, pipelined operation; column address can
be changed every clock cycle Internal banks for hiding row access/precharge Programmable burst lengths: 1, 2, 4, 8, or full page Auto precharge, includes concurrent auto precharge
and auto refresh modes Self refresh mode (not available on AAT devices) Auto refresh
– 64ms, 8192-cycle (commercial and industrial) – 16ms, 8192-cycle (automotive) LVTTL-compatible inputs and outputs Single 3.3V ±0.3V power supply AEC-Q100 PPAP submission 8D response time
Options
Configurations
– 64 Meg x 4 (16 Meg x 4 x 4 banks)
– 32 Meg x 8 (8 Meg x 8 x 4 banks)
– 16 Meg x 16 (4 Meg x 16 x 4 banks) Write recovery (tWR)
– tWR = 2 CLK Plastic package – OCPL1
– 54-pin TSOP II OCPL1 (400 mil)
(standard)
Marking
64M4 32M8 16M16
A2
TG
Options
Marking
– 54-pin TSOP II OCPL1 (400 mil)
P
Pb-free
– 60-ball FBGA (x4, x8) (8mm x 16mm) FB
– 60-ball FBGA (x4, x8) (8mm x 16mm) BB
Pb-free
– 54-ball VFBGA (x16) (8mm x 14 mm) FG2
– 54-ball VFBGA (x16) (8mm x 14 mm) BG2
Pb-free
– 54-ball VFBGA (x16) (8mm x 8 mm)
F43
– 54-ball VFBGA (x16) (8mm x 8 mm)
B43
Pb-free
Timing – cycle time
– 6ns @ CL = 3 (x8, x16 only)
-6A
– 7.5ns @ CL =...
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