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HM5164805F Dataheets PDF



Part Number HM5164805F
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description (HM5164805F / HM5165805F) 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
Datasheet HM5164805F DatasheetHM5164805F Datasheet (PDF)

HM5164805F Series HM5165805F Series 64 M EDO DRAM (8-Mword × 8-bit) 8 k Refresh/4 k Refresh ADE-203-1057B (Z) Rev. 2.0 Nov. 30, 1999 Description The Hitachi HM5164805F Series, HM5165805F Series are 64M-bit dynamic RAMs organized as 8,388,608-word × 8-bit. They have realized high performance and low power by employing CMOS process technology. HM5164805F Series, HM5165805F Series offer Extended Data Out (EDO) Page Mode as a high speed access mode. They have the package variation of standard 32-pi.

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HM5164805F Series HM5165805F Series 64 M EDO DRAM (8-Mword × 8-bit) 8 k Refresh/4 k Refresh ADE-203-1057B (Z) Rev. 2.0 Nov. 30, 1999 Description The Hitachi HM5164805F Series, HM5165805F Series are 64M-bit dynamic RAMs organized as 8,388,608-word × 8-bit. They have realized high performance and low power by employing CMOS process technology. HM5164805F Series, HM5165805F Series offer Extended Data Out (EDO) Page Mode as a high speed access mode. They have the package variation of standard 32-pin plastic SOJ and standard 32pin plastic TSOPII. Features • Single 3.3 V supply: 3.3 V ± 0.3 V • Access time: 50 ns/60 ns (max) • Power dissipation  Active: 414 mW/378 mW (max) (HM5164805F Series) : 486 mW/414 mW (max) (HM5165805F Series)  Standby : 1.8 mW (max) (CMOS interface) : 1.1 mW (max) (L-version) • EDO page mode capability • Refresh cycles  RAS-only refresh 8192 cycles /64 ms (HM5164805F, HM5164805FL) 4096 cycles /64 ms (HM5165805F, HM5165805FL)  CBR/Hidden refresh 4096 cycles /64 ms (HM5164805F, HM5164805FL, HM5165805F, HM5165805FL) HM5164805F Series, HM5165805F Series • 4 variations of refresh  RAS-only refresh  CAS-before-RAS refresh  Hidden refresh  Self refresh (L-version) • Battery backup operation (L-version) Ordering Information Type No. HM5164805FJ-5 HM5164805FJ-6 HM5164805FLJ-5 HM5164805FLJ-6 HM5165805FJ-5 HM5165805FJ-6 HM5165805FLJ-5 HM5165805FLJ-6 HM5164805FTT-5 HM5164805FTT-6 HM5164805FLTT-5 HM5164805FLTT-6 HM5165805FTT-5 HM5165805FTT-6 HM5165805FLTT-5 HM5165805FLTT-6 Access time 50 ns 60 ns 50 ns 60 ns 50 ns 60 ns 50 ns 60 ns 50 ns 60 ns 50 ns 60 ns 50 ns 60 ns 50 ns 60 ns 400-mil 32-pin plastic TSOP II (TTP-32DC) Package 400-mil 32-pin plastic SOJ (CP-32DC) 2 HM5164805F Series, HM5165805F Series Pin Arrangement (HM5164805F Series) 32-pin SOJ 32-pin TSOP VCC I/O0 I/O1 I/O2 I/O3 NC VCC WE RAS A0 A1 A2 A3 A4 A5 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V SS I/O7 I/O6 I/O5 I/O4 V SS CAS OE A12 A11 A10 A9 A8 A7 A6 V SS VCC I/O0 I/O1 I/O2 I/O3 NC VCC WE RAS A0 A1 A2 A3 A4 A5 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V SS I/O7 I/O6 I/O5 I/O4 V SS CAS OE A12 A11 A10 A9 A8 A7 A6 V SS (Top view) (Top view) Pin Description Pin name A0 to A12 Function Address input — Row/Refresh address A0 to A12 — Column address A0 to A9 Data input/output Row address strobe Column address strobe Write enable Output enable Power supply Ground No connection I/O0 to I/O7 RAS CAS WE OE VCC VSS NC 3 HM5164805F Series, HM5165805F Series Pin Arrangement (HM5165805F Series) 32-pin SOJ 32-pin TSOP VCC I/O0 I/O1 I/O2 I/O3 NC VCC WE RAS A0 A1 A2 A3 A4 A5 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VSS I/O7 I/O6 I/O5 I/O4 VSS CAS OE NC A11 A10 A9 A8 A7 A6 V SS VCC I/O0 I/O1 I/O2 I/O3 NC VCC WE RAS A0 A1 A2 A3 A4 A5 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VSS I/O7 I/O6 I/O5 I/O4 VSS CAS OE NC A11 A10 A9 A8 A7 A6 V SS (Top view) (Top view) Pin Description Pin name A0 to A11 Function Address input — Row/Refresh address A0 to A11 — Column address A0 to A10 Data input/output Row address strobe Column address strobe Write enable Output enable Power supply Ground No connection I/O0 to I/O7 RAS CAS WE OE VCC VSS NC 4 HM5164805F Series, HM5165805F Series Block Diagram (HM5164805F Series) RAS CAS WE OE Timing and control A0 A1 to A9 Row decoder • • • Column address buffers Column decoder 8M array 8M array 8M array 8M array 8M array 8M array 8M array 8M array I/O buffers I/O0 to I/O7 • • • Row address buffers A10 to A12 5 HM5164805F Series, HM5165805F Series Block Diagram (HM5165805F Series) RAS CAS WE OE Timing and control A0 A1 to A10 Row decoder • • • Column address buffers Column decoder 8M array 8M array 8M array 8M array 8M array 8M array 8M array 8M array I/O buffers I/O0 to I/O7 • • • Row address buffers A11 6 HM5164805F Series, HM5165805F Series Operation Table RAS H L L L L L H to L L CAS × L L L L H L L WE × H L* L* × H H 2 2 OE × L × H L to H × × H I/O 0 to I/O 7 High-Z Dout Din Din Dout/Din High-Z High-Z High-Z Operation Standby Read cycle Early write cycle Delayed write cycle Read-modify-write cycle RAS -only refresh cycle CAS -before-RAS refresh cycle or Self refresh cycle (L-version) Read cycle (Output disabled) H to L Notes: 1. H: VIH (inactive), L: VIL (active), ×: VIH or VIL 2. t WCS ≥ 0 ns: Early write cycle t WCS < 0 ns: Delayed write cycle Absolute Maximum Ratings Parameter Terminal voltage on any pin relative to V SS Power supply voltage relative to V SS Short circuit output current Power dissipation Storage temperature Symbol VT VCC Iout PT Tstg Value –0.5 to VCC + 0.5 (≤ 4.6 V (max)) –0.5 to +4.6 50 1.0 –55 to +125 Unit V V mA W °C DC Operating Conditions Parameter Supply voltage Symbol VCC VSS Input high voltage Input low voltage Ambient temperature range VIH VIL.


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