ICS331

ADVANCE INFORMATION ICS331 QTClock™ Single Output Clock Features Packaged as 8 pin SOIC Zero ppm synthesis error in most applications Input crystal frequency from 5 to 27 MHz Input clock frequency from 3 to 50 MHz Output clock frequencies up to 200 MHz Four ROM locations for frequency and spread selection Spread spectrum capability for low EMI Duty cycle of 45/55 3.3 V operating voltage (consult ICS for 5V) Advanced, low power CMOS pr Description The ICS331 is a low cost frequency generator that is factory programmable. Using Phase-LockedLoop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal or clock input to produce a spread or non-spread output clock. The chip has two select inputs that allow the selection of up to four different frequencies stored in memory. If multiple output selections and spread spectrum are not required, refer to the ICS300 and ICS301 for lower cost solutions. The device also has an power down feature that tri states the clock outputs and turns off the PLL when the PDTS pin is taken low. This data sheet is to be used with the one-page programming information for the complete specification on the device. Block Diagram S1, S0 X1/ICLK PDTS Optional crystal capacitors MDS 331 1 Revision 112900 Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126(408) 295-9800tel www.icst.com www.DataSheet4U.com 5-27 MHz crystal or clock w w .D w 2 Crystal Oscillator VDD GND t a S a e...