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UDA1384 Dataheets PDF



Part Number UDA1384
Manufacturers NXP
Logo NXP
Description Multichannel audio coder-decoder
Datasheet UDA1384 DatasheetUDA1384 Datasheet (PDF)

UDA1384 Multichannel audio coder-decoder Rev. 02 — 17 January 2005 Product data sheet 1. General description The UDA1384 is a single-chip consisting of 4 plus 1 Analog-to-Digital Converters (ADC) and 6 Digital-to-Analog Converters (DAC) with signal processing features employing bitstream conversion techniques. The multichannel configuration makes the device eminently suitable for use in digital audio equipment which incorporates surround feature. The UDA1384 supports conventional 2 channels per .

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UDA1384 Multichannel audio coder-decoder Rev. 02 — 17 January 2005 Product data sheet 1. General description The UDA1384 is a single-chip consisting of 4 plus 1 Analog-to-Digital Converters (ADC) and 6 Digital-to-Analog Converters (DAC) with signal processing features employing bitstream conversion techniques. The multichannel configuration makes the device eminently suitable for use in digital audio equipment which incorporates surround feature. The UDA1384 supports conventional 2 channels per line data transfer conformable to the I2S-bus format with word lengths of up to 24 bits, the MSB-justified format with word lengths of up to 24 bits and the LSB-justified format with word lengths of 16 bits, 20 bits and 24 bits, as well as 4 channels to 6 channels per line transfer mode. The device also supports a combination of the MSB-justified output format and the LSB-justified input format. The UDA1384 has special sound processing features in the Direct Stream Digital (DSD) playback mode, de-emphasis, volume and mute which can be controlled via the L3-bus or I2C-bus interface. 2. Features 2.1 General s s s s s 2.7 V to 3.6 V power supply 5 V tolerant digital inputs 24-bit data path Selectable control: via L3-bus or I2C-bus microcontroller interface Supports sample frequency ranges for: x Audio ADC: fs = 16 kHz to 100 kHz x Voice ADC: fs = 7 kHz to 50 kHz x Audio DAC: fs = 16 kHz to 200 kHz Separate power control for ADC and DAC ADC plus integrated high-pass filter to cancel DC offset Integrated digital filter plus DAC Slave mode only applications Easy application s s s s s Philips Semiconductors UDA1384 Multichannel audio coder-decoder 2.2 Multiple format data interface s Audio interface supports standard I2S-bus, MSB-justified, LSB-justified and two multichannel formats s Voice interface supports I2S-bus and mono channel formats 2.3 Digital sound processing s Control via L3-bus or I2C-bus: x Channel independent digital logarithmic volume x Digital de-emphasis for fs = 32 kHz, 44.1 kHz, 48 kHz or 96 kHz x Soft or quick mute x Output signal polarity control 2.4 Advanced audio configuration s Inputs: x 4 single-ended audio inputs (2 × stereo) with programmable gain amplifiers x 1 single-ended voice input s Outputs: x 6 differential audio outputs (3 × stereo) s DSD mode to support stereo DSD playback s High linearity, wide dynamic range and low distortion s DAC digital filter with selectable sharp or soft roll-off 3. Applications s Excellently suitable for multichannel home audio-video application 4. Quick reference data Table 1: Quick reference data VDDD = VDDA(AD) = VDDA(DA) = 3.3 V; Tamb = 25 °C; RL = 22 kΩ; all voltages referenced to ground (pins VSS); unless otherwise specified. Symbol Supplies VDDA(AD) VDDA(DA) VDDD IDDA(AD) IDDA(DA) IDDD ADC analog supply voltage DAC analog supply voltage digital supply voltage ADC analog supply current DAC analog supply current fADC = 48 kHz fDAC = 48 kHz 2.7 2.7 2.7 3.3 3.3 3.3 30 20 31 3.6 3.6 3.6 V V V mA mA mA Parameter Conditions Min Typ Max Unit digital supply current fADC = fDAC = 48 kHz; fVOICE = 48 kHz 9397 750 14366 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 02 — 17 January 2005 2 of 55 Philips Semiconductors UDA1384 Multichannel audio coder-decoder Table 1: Quick reference data …continued VDDD = VDDA(AD) = VDDA(DA) = 3.3 V; Tamb = 25 °C; RL = 22 kΩ; all voltages referenced to ground (pins VSS); unless otherwise specified. Symbol IDDD(pd) Parameter Conditions Min −20 at 0 dB setting; 900 mV input at −1 dBFS at −60 dBFS; A-weighted code = 0; A-weighted [1] [2] Typ 18 14 −1.2 −88 −37 98 100 Max +85 −0.7 −82 −30 - Unit mA mA °C dB dB dB dB dB digital supply current audio and voice in Power-down mode ADCs power-down DAC power-down ambient temperature digital output level total harmonic distortion-plus-noise to signal ratio signal-to-noise ratio channel separation Tamb D0 (THD+N)/S Audio analog-to-digital converter −2.5 89 - S/N αcs Digital-to-analog converter Differential mode Vo(rms) (THD+N)/S output voltage (RMS value) total harmonic distortion-plus-noise to signal ratio signal-to-noise ratio channel separation output voltage (RMS value) total harmonic distortion-plus-noise to signal ratio signal-to-noise ratio channel separation at 0 dBFS digital input at 0 dBFS at −60 dBFS; A-weighted code = 0; A-weighted at 0 dBFS digital input at 0 dBFS at −60 dBFS; A-weighted code = 0; A-weighted 1.9 100 2.0 −98 −50 110 114 1.0 −88 −45 105 110 2.1 −89 −45 V dB dB dB dB V dB dB dB dB S/N αcs Vo(rms) (THD+N)/S Single-ended mode S/N αcs [1] [2] The input voltage can be up to 2 V (RMS) when the current through the ADC input pin is limited to approximately 1 mA by using a series resistor. The input voltage to the ADC scales proportionally with the power supply voltage. 5. Ordering information Table 2: Ordering information Package Name UDA1384H QFP44 Description plastic quad flat package; 44 leads (lead length 1.3 mm); b.


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