AT91SO100

Features General High-performance, Low-power 32-bit ARM®-SC100 Enhanced RISC Architecture Von Neumann Load / Store Architecture – single 32-bit Data Bus for Instructions and Data Memory Protection unit Internal Oscillator (VFO) (up to 50 MHz) ESD Protection to ± 2000V (± 6000V on the ISO interfaces) Operating Ranges: 3.3V (+/- 10%) Compliant with EMV Level 1, VISA PED, APACS, ZKA, Common Criteria (EAL4+), FINREAD Memory 256 bits of Key Storage (battery backup) 32K Bytes of internal ROM Memory (BOOT, library) 256K Bytes of Internal EEPROM, Including 128 OTP Bytes and 384-byte Bitaddressable Bytes – 1 to 128-byte Program/Erase – 2 ms Program, 2 ms Erase – Endurance: 500,000 Write/Erase Cycles at temperature of 25 degrees C – 10 Years Data Retention 100K Bytes of Internal RAM (4KB Crypto RAM) up to 16M Bytes of External Memory (accessed by page) Secure Microcontroller for Electronic Transaction Terminal / Reader AT91SO100/101 Summary Peripherals Page Unit to access External Memory Page Static Memory Controller Two ISO 7816 controllers with DC/DC (one of them can be multiplexed to address 4 SAM) USB 2.0 Full Speed (8 endpoints) SPI Controller (up to 24 Mbps) Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) Triple Track Magstripe Logical Interface 5 8-bit I/O Port Interface (LEDs, Keyboard, LCD, spare...) Real Time Clock (RTC) with Alarm interrupt System Timer including a 16-bit Counter, Watchdog a...