Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptiona.
100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Single Pulse Avalanche Energy Peak Diode Recovery voltage slope Storage Temperature Operating Junction Temperature Value 100 100 ± 20 140 99 560 450 3 2900 5 -55 to 175 -55 to 175 Unit V V V A A A W W/°C mJ V/ns °C °C
(
•) Pulse width limited by safe operating area. August 2001
.
(1) Starting T j = 25 oC, ID = 70A, VDD= 50V (2) ISD ≤140A, di/dt ≤200A/µs, VDD ≤ V (BR)DSS, T j ≤ TJMAX.
1/8
STY140NS10
THERMAL DATA
Rthj-case Rthj-amb Tj Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead T.
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