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CY2DP314
1 of 2:4 Differential Clock/Data Fanout Buffer
Description
CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features Four ECL/PECL differential outputs One ECL/PECL differential or single-ended inputs (CLKA) One HSTL differential or single-ended inputs (CLKB) Hot-swappable/-insertable 50-ps output-to-output skew 150-ps device-to-device skew 400-ps propagation delay (typical) 0.8-ps RMS period...
Cypress Semiconductor
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