CMOS Timing Controller with CCD Drivers
CXD2480R (1/3) IL08D
C-MOS TIMING CONTROLLER WITH CCD DRIVERS
—TOP VIEW— 36 35 34 33 32 31 30 29 28 27 26 25
31 OSCI 1 ...
Description
CXD2480R (1/3) IL08D
C-MOS TIMING CONTROLLER WITH CCD DRIVERS
—TOP VIEW— 36 35 34 33 32 31 30 29 28 27 26 25
31 OSCI 1 DCIN 32 OSCO DCOUT 48
GND
GND
VDD
NC AVDD3
AVDD2 AVDD1
GND
37 38 39 40 41 42 43 44 45 46 47 48
VDD
GND
GND VDD
VL VH
GND
24 23 22 21 20 19 18 17 16 15 14 13
34 23 24 19 18 17
CKI HD VD SCK SDAT SEN
MCK PBLK CLPDM ID WEN XSHP XSHD XRS ADCK RG H1 H2 V1
26 16 15 21 25 11 10 12 13 7 5 4 37 38 40 41 43 47 46 45
1 2 3 4 5 6 7 8 9 10 11 12
V2 V3 V4
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
I/O I — — O O — O — — O O O O — O O I I I — O — I I
SIGNAL DCIN NC AVDD3 H2 H1 GND RG AVDD2 AVDD1 XSHD XSHP XRS ADCK GND LLPDM PBLK SEN SDAT SCK VDD ID GND HD VD
PIN NO. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
I/O O O I — I — I O — I — I O O — O O — O — O O O O
SIGNAL WEN MCK TEST2 VDD RST GND OSCI OSCO GND CKI VDD TEST1 V1 V2 GND V3 V4 VL SUB VH CPP3 CPP2 CPP1 DCOUT
36 37 TEST1 TEST2 RST 29
SUB CPP1 CPP2 CPP3
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CXD2480R (2/3) INPUT CKI DCIN
; CLOCK ; OPERATIONAL AMPLIFIER INPUT FOR GENERATING THE SUB CLAMP VOLTAGE ; HORIZONTAL SYNC SIGNAL HD ; OSCILLATOR OSCI ; RESET RST ; SERIAL COMMUNICATION CLOCK SCK ; SERIAL COMMUNICATION DATA SDAT ; SERIAL COMMUNICATION STROBE SEN TEST1, TEST2 ; TEST ; VERTICAL SYNC SIGNAL VD OUTPUT ADCK CLPDM CPP1 - CPP3 DCOUT H1, H2 ID MCK OSCO PBLK RG SUB V1 - V4 WEN XRS XSHD XSHP
; ; ; ; ; ; ; ; ; ; ; ; ...
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