June 1996, ver. 3
®
MAX 5000
Programmable Logic Device Family
Data Sheet
Features...
s Advanced Multiple Array MatriX (MAX) 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
s Complete family of high-performance, erasable CMOS EPROM EPLDs for designs ranging from fast 28-pin address decoders to ...
