SY100E452

Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS 5-BIT DIFFERENTIAL REGISTER SY10E452 SY1S0YE10405E2452 SY100E452 FEATURES s Differential D, CLK and Q s Extended 100E VEE range of –4.2V to –5.5V s VBB output for single-ended use s 1100MHz min. toggle frequency s Asynchronous Master Reset s Fully compatible with Motorola MC10E/100E452 s Available in 28-pin PLCC package BLOCK DIAGRAM D0 D0 D1 D1 D2 D2 D3 D3 D4 D4 CLK CLK MR VBB D Q R D Q R D Q R D Q R D Q R M9999-032206 [email protected] or (408) 955-1690 Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 DESCRIPTION The SY10/100E452 are 5-bit differential registers with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go LOW. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the devices. The clamping action will assert the /D and the /CLK sides of the inputs. Because of the edge-triggered flip-flop nature of the devices, simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. The fully differential design of the devices makes them ideal for very high frequency applications where a registered data path is necessary. PIN NAMES Pin D [0:4], /D [0:4] MR CLK, /CLK VBB Q [0:4], Q [0:4] VCCO Function Differential...