KM732V789

KM732V789 Document Title 128Kx32-Bit Synchronous Pipelined Burst SRAM 128Kx32 Synchronous SRAM Revision History Rev. No. 1.0 2.0 History Initial draft change tCYC from 8.5ns to 10.0ns. Modify Rev No. from 0.0 to 1.0. Modify DC characteristics( Input Leakage Current test Conditions) form VDD=VSS to VDD to Max. Add VDDQ Supply voltage( 2.5V ) Remove 119BGA(7x17 Ball Grid Array Package) . Draft Date May . 19. 1998 June . 02. 1998 Remark Final Final 3.0 June. 08. 1998 Final 4.0 5.0 Dec. 02. 1998 Feb. 10. 1999 Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- February 1999 Rev 5.0 KM732V789 128Kx32 Synchronous SRAM 128Kx32-Bit Synchronous Pipelined Burst SRAM FEATURES Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address and Control Registers. VDD= 3.3V+0.3V/-0.165V Power Supply. VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O. 5V Tolerant Inputs Except I/O Pins. Byte Writable Function. Global Write Enable Controls a full bus-width write. Power Down State via ZZ Signal. LBO Pin allows a choice o...