Features
80C51 Core Architecture 256 Bytes of On-chip RAM 1K Bytes of On-chip XRAM 32K Bytes of On-chip Flash Memory
– Data Retention: 10 Years at 85°C Erase/Write Cycle: 100K
Boot Code Section with Independent Lock Bits 2K Bytes of On-chip Flash for Bootloader In-System Programming by On-Chip Boot Program (CAN, UART) and IAP Capability 2K By...
