Document
74LVT125; 74LVTH125
3.3 V quad buffer; 3-state
Rev. 7 — 31 May 2016
Product data sheet
1. General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.
2. Features and benefits
Quad bus interface 3-state buffers Output capability: +64 mA and 32 mA TTL input and output switching levels Input and output interface capability to systems at 5 V supply Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs Live insertion and extraction permitted No bus current loading when output is tied to 5 V bus Power-up 3-state Latch-up protection:
JESD78: exceeds 500 m.