MC74HC646

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Bus Transceivers and D Flip-Flops High–Performance Silicon–Gate CMOS The MC54/74HC646 is identical in pinout to the LS646. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These devices are bus transceivers with D flip–flops. Depending on the status of the Data–Source Selection pins, data may be routed to the outputs either from the flip–flops or transmitted real–time from the inputs (see Function Table and Application Information). The Output Enable and the Direction pins control the transceiver’s function. Bus A and Bus B cannot be routed as outputs to each other simultaneously, but can be routed as inputs to the A and B flip–flops. Also, the A and B flip–flops can be routed as outputs to Bus A and Bus B. Additionally, when either or both of the ports are in the high–impedance state, these I/O pins may be used as inputs to the D flip–flops for data storage. The user should note that because the clocks are not gated with the Direction and Output Enable pins, data at the A and B ports may be clocked into the storage flip–flops at any time. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 780 FETs or 195 ...