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DS1249W Dataheets PDF



Part Number DS1249W
Manufacturers Maxim Integrated Products
Logo Maxim Integrated Products
Description 3.3V 2048kb Nonvolatile SRAM
Datasheet DS1249W DatasheetDS1249W Datasheet (PDF)

19-5633; Rev 11/10 www.maxim-ic.com FEATURES  10 years minimum data retention in the absence of external power  Data is automatically protected during power loss  Unlimited write cycles  Low-power CMOS operation  Read and write access times of 100ns  Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time  Optional industrial (IND) temperature range of -40°C to +85°C  JEDEC standard 32-pin DIP package DS1249W 3.3V 2048kb Nonvolat.

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19-5633; Rev 11/10 www.maxim-ic.com FEATURES  10 years minimum data retention in the absence of external power  Data is automatically protected during power loss  Unlimited write cycles  Low-power CMOS operation  Read and write access times of 100ns  Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time  Optional industrial (IND) temperature range of -40°C to +85°C  JEDEC standard 32-pin DIP package DS1249W 3.3V 2048kb Nonvolatile SRAM PIN ASSIGNMENT NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 VCC 31 A15 30 A17 29 WE 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 DQ7 20 DQ6 19 DQ5 18 DQ4 17 DQ3 32-Pin Encapsulated Package 740mil Extended PIN DESCRIPTION A0–A17 - Address Inputs DQ0–DQ7 - Data In/Data Out CE - Chip Enable WE - Write Enable OE - Output Enable VCC GND - Power (+3.3V) - Ground NC - No Connect DESCRIPTION The DS1249W 2048kb nonvolatile (NV) SRAMs are 2,097,152-bit, fully static, NV SRAMs organized as 262,144 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry that constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption. There is no limit on the number of write cycles that can be executed, and no additional support circuitry is required for microprocessor interfacing. 1 of 8 DS1249W READ MODE The DS1249 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 18 address inputs (A0 – A17) defines which of the 262,144 bytes of data is accessed. Valid data will be available to the eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing that CE and OE access times are also satisfied. If OE and CE access times are not satisfied, then data access must be measured from the later-occurring signal ( CE or OE ) and the limiting parameter is either tCO for CE or tOE for OE rather than tACC. WRITE MODE The DS1249 executes a write cycle whenever the WE and CE signals are active (low) after address inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time (tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during write cycles to avoid bus contention. However, if the output drivers are enabled ( CE and OE active), then WE will disable the outputs in tODW from its falling edge. DATA-RETENTION MODE The DS1249W provides full functional capability for VCC greater than 3.0 volts and write protects by 2.8V. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically write protects themselves, all inputs become “don’t care,” and all outputs become high impedance. As VCC falls below approximately 2.5V, a power-switching circuit connects the lithium energy source to RAM to retain data. During power-up, when VCC rises above approximately 2.5V, the power-switching circuit connects external VCC to the RAM and disconnects the lithium energy source. Normal RAM operation can resume after VCC exceeds 3.0V. FRESHNESS SEAL Each DS1249 device is shipped from Maxim with its lithium energy source disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than VTP, the lithium energy source is enabled for battery backup operation. 2 of 8 ABSOLUTE MAXIMUM RATINGS Voltage on Any Pin Relative to Ground Operating Temperature Range Commercial: Industrial: Storage Temperature Range Lead Temperature (soldering, 10s) Note: EDIP is wave or hand soldered only. DS1249W -0.3V to +4.6V 0°C to +70°C -40°C to +85°C -40°C to +85°C +260°C This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER SYMBOL MIN TYP Power-Supply Voltage VCC 3.0 3.3 Logic 1 VIH 2.2 Logic 0 VIL 0.0 (TA: See Note 10) MAX UNITS NOTES 3.6 V VCC V +0.4 V DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Input Leakage Current IIL I/O Leakage Current CE ≥ VIH ≤ VCC IIO Output Current at 2.2V Output Current at 0.4V IOH IOL Standby Current CE = 2.2V ICCS1 Standby Current CE = VCC - 0.2V .


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