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DM74LS469

Fairchild Semiconductor

8-Bit Up/Down Counter

DM74LS469 8-Bit Up/Down Counter April 1998 DM74LS469 8-Bit Up/Down Counter General Description The ’LS469 is an 8-bit ...


Fairchild Semiconductor

DM74LS469

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Description
DM74LS469 8-Bit Up/Down Counter April 1998 DM74LS469 8-Bit Up/Down Counter General Description The ’LS469 is an 8-bit synchronous up/down counter with parallel load and hold capability. Three function-select inputs (LD, UD, CBI) provide one of four operations which occur synchronously on the rising edge of the clock (CK). The LOAD operation loads the inputs (D7–D0) into the output register (Q7–Q0). The HOLD operation holds the previous value regardless of clock transitions. The INCREMENT operation adds one to the output register when the carry-in input is TRUE (CBI = LOW), otherwise the operation is a HOLD. The carry-out (CBO) is TRUE (CBO = LOW) when the output register (Q7–Q0) is all HIGHs, otherwise FALSE (CBO = HIGH). The DECREMENT operation subtracts one from the output register when the borrow-in input is TRUE (CBI = LOW), otherwise the operation is a HOLD. The borrow-out (CBO) is TRUE (CBO = LOW) when the output register (Q7–Q0) is all LOWs, otherwise FALSE (CBO = HIGH). The output register (Q7–Q0) is enabled when OE is LOW, and disabled (HI-Z) when OE is HIGH. The output drivers will sink the 24 mA required for many bus-interface standards. Two or more ’LS469 octal up/down counters may be cascaded to provide larger counters. Features/Benefits n 8-bit up/down counter for microprogram-counter, DMA controller and general-purpose counting applications n 8 bits matches byte boundaries n Bus-structured pinout n 24-pin SKINNYDIP saves space n 3-STATE outputs drive bus lin...




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