MC74HCT74A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT74A is identical in pinout to the LS74. This device may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device consists of two D flip–flops with individual Set, Reset, and Clock inputs. Information at a D–input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip–flop. The Set and Reset inputs are asynchronous. Output Drive Capability: 10 LSTTL Loads TTL NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 µA In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 136 FETs or 34 Equivalent Gates LOGIC DIAGRAM RESET 1 DATA 1 1 2 5 14 MC74HCT74A N SUFFIX PLASTIC PACKAGE CASE 646–06 1 14 1 D SUFFIX SOIC PACKAGE CASE 751A–03 ORDERING INFORMATION MC54HCTXXAJ MC74HCTXXAN MC74HCTXXAD Ceramic Plastic SOIC PIN ASSIGNMENT RESET 1 DATA 1 CLOCK 1 SET 1 Q1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC RESET 2 DATA 2 CLOCK 2 SET 2 Q2 Q2 Q1 Q1 GND CLOCK 1 SET 1 RESET 2 DATA 2 3 4 6 Q1 FUNCTION TABLE 13 12 9 Inputs Set Reset Clock Data Q2 L H L H H H H H H L L H H H H H X X X X X X H L X X X Outputs Q Q H L L H H* H* H L L H No Change No Change No Change CLOCK 2 SET 2 1...