STD25NF10L

N-CHANNEL 100V - 0.030 Ω - 25A DPAK LOW GATE CHARGE STripFET™ II POWER MOSFET TYPE STD25NF10L s s s s s s STD25NF10L VDSS 100 V RDS(on) < 0.035 Ω ID 25 A TYPICAL RDS(on) = 0.030 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW THRESHOLD DEVICE LOGIC LEVEL DEVICE SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4") 3 1 DPAK TO-252 (Suffix “T4”) DESCRIPTION This MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID(*) ID IDM() Ptot dv/dt (1) Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature Value 100 100 ± 16 25 25 100 100 0.67 20 450 -55 to 175 Unit V V V A A A W W/°C V/ns mJ °C EAS (2) Tstg Tj () Pulse width limited by safe operating area. (*) Current Limited by ...