ST10F269

ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA s HIGH PERFORMANCE 40MHz CPU WITH DSP FUNCTION – 16-BIT CPU WITH 4-STAGE PIPELINE – 50ns INSTRUCTION CYCLE TIME AT 40MHz MAX CPU CLOCK – MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR – REPEAT UNIT – ENHANCED BOOLEAN BIT MANIPULATION FACILITIES – ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS – SINGLE-CYCLE CONTEXT SWITCHING SUPPORT s MEMORY ORGANIZATION – 256K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER. – 100K ERASING/PROGRAMMING CYCLES. – UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTES WITH CAN) – 2K BYTE ON-CHIP INTERNAL RAM (IRAM) – 10K BYTE ON-CHIP EXTENSION RAM (XRAM) s FAST AND FLEXIBLE BUS – PROGRAMMABLE EXTERNAL BUS CHARACTERISTICS FOR DIFFERENT ADDRESS RANGES – 8-BIT OR 16-BIT EXTERNAL DATA BUS – MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES – FIVE PROGRAMMABLE CHIP-SELECT SIGNALS – HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT s INTERRUPT – 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SINGLE CYCLE INTERRUPT DRIVEN DATA TRANSFER – 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLING RATE DOWN TO 25ns s TIMERS – TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS s TWO 16-CHANNEL CAPTURE / COMPARE UNITS s A/D CONVERTER – 16-CHANNEL 10-BIT – 4.85µs CONVERSION TIME AT 40MHz CPU CLOCK s 4-CHANNEL PWM UNIT s SERIAL CHANNELS – SYNCHRONOUS / ASYNCHRONOUS SERIAL CHANNEL –...