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&RQWHQWV 0 1 1.1 1.2 1.3 2 2.1 2.2 2.3 3 4 4.1 4.2 4.3 4.4 5 6 6.1 6.2 6.3 6.4 7 7.1 7.2 7.3 7.4 7.5 8 8.1 8.2 9 9.1 9.2 9.3 9.4 9.5 9.6 Revision History General Overview Features Applications Functional Description Pinning Pin Description Pin Configuration Package Outline Functional Block Diagram Circuit Description Block Level Description Supply Concept Power Down Conditions Matching with Timing Signals of GOLD-uC Internal Input/Output Circuits Electrical Characteristics Absolute Maximum Ratings Operational Range AC/DC Characteristics Typical modulator measurement results Test Circuits Test Circuit 1 Test board Layout top Test board Top place Test board Layout bottom Test board Bottom place Application Frequency plan for GSM application Application hint for phase adjust S-Parameters and Input/Output impedances S-Parameters: Transmit Mixer Output MO/MOX S-Parameters: IF Input IF/IFX S-Parameters: RF Input RFB1/RFB2 S-Parameters: Output to Receiver RF/RFX S-Parameters: Modulator Output E/EX S-Parameters: Modulatór Input LO/LOX
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Changes from Data sheet PMB2240 V1.5 ( 08.96 ) to Data sheet PMB2240 V1.6 ( 5.97 ) 'DWD VKHHW 9 3DJH ,WHP 4 1 5 2.1 'DWD VKHHW 9 3DJH ,WHP 4 1 5 2.1
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6XEMHFW General Overview Pinning
&KDQJH Revised Pin 9 changed to VCCPR; Pin 13 changed to SLEEP; Pins 17,18,20,21 changed to GND pins Prescaler with separate VCCPR-pin; Former SLEEP/PR and SLEEP/RF are merged to SLEEP; Oscillator/Buffer for RFIN removed; Revised Revised ESD integrity revised; Item symbols revised Temperature range 30°C - 85°C minimum H-voltage increased to 2.3V Spec item symbols revised Now referred to Test circuit 1 Smith diagrams of simulated S-Params replaced by measured S-Param-table and I/O impedances
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Functional block diagram
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Circuit description Internal I/O Circuits Asolute Maximum ratings Operational range Prescaler
8,9,10 11 12 13 15 12-18 14 27-30
4 5 6.1 6.2 23 6 6.3 #4 9
8,9,10 11 12 13 15 12-17 14 27-31
4 5 6.1 6.2 23 6 6.3 #4 9
Electrical Characteristics 10 AC/DC characteristics 11 S-Parameters
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Transmitter with I/Q modulator Direct I/Q modulation Generation of orthogonal carriers with possibility of phase adjust with external resistors at OFF1/OFF2 32dB minimum carrier rejection, 35dB minimum SSB rejection with 1 Vpp I/Q drive level 50dB rejection of third order products with 1 Vpp I/Q drive level -3dBm output power at 1 Vpp I/Q drive level with 200 Ohms load according testcircuit 1 RF oscillator signal is AC-coupled to internal buffer stage (symmetrical or unsymmetrical) The RF oscillator-signal is buffered for off-chip use, especially for receiver chip PMB2405. Prescaler for the RF oscillator signal Possibility to build RF-PLL with integrated prescaler + PMB2306 Possibility to use the IF oscillator signal from the IF-VCO on PMB2405 Possibility to use external source for IF oscillator-signal Digital parts of fixed IF frequency PLL (fixed-PLL) for IF-VCO on PMB2405 Supply voltage range from 2.7 V to 4.5 V P-TQFP-48 package Temperature range -30° to 85°C $SSOLFDWLRQV Vector modulated digital mobile cellular systems as GSM, DAMPS, PDC,WLAN etc. Various modulation schemes, such as PM, PSK, FSK, QAM, QPSK, GMSK etc. Analog systems with FM and AM modulation Space and power saving optimizations of existing discrete transmitter circuits )XQFWLRQDO 'HVFULSWLRQ
The PMB2240 is a single-chip transmitter which includes a prescaler for the main oscillator signal and a fixed frequency PLL for the IF oscillator. The transmitter is designed for use in conjunction with the single-chip receiver PMB2405 and the CMOS PLL PMB2306. The RF oscillator signal can be supplied from an external source symmetrically as well as unsymmetrically. The oscillator signal can be buffered for off-chip use, depending on a separate power down pin. There is a prescaler by 64/65 for the RF oscillator signal on chip, which can be used to implement a PLL together with the PMB2306. The on-chip fixed-PLL consists of the system clock divider, the IF oscillator signal divider, the phase detect.