UCN5881

5881 BiMOS II DUAL 8-BIT LATCHED DRIVER 5881 BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches (two sets of eight), CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect against damage from high junction temperatures and clamp diodes for inductive load transient suppression. The CMOS inputs cause minimal circuit loading and are compatible with standard CMOS, PMOS, and NMOS circuits. TTL or DTL circuits may require the use of appropriate pull up resistors. When reading back, each data input will sink 8 mA (if its corresponding latch is low) or source 400 µA (if its corresponding latch is high). The read back feature is for error checking. It allows the system to verify that data has been received and latched. The bipolar outputs are suitable for use with low-power relays, solenoids, and stepping motors. The very-low output saturation voltage makes this device well-suited for driving LED arrays. The output transistors are capable of sinking 50 mA and will maintain at least 20 V in the OFF state. Outputs may be paralleled for higher current capability. Data Sheet 26180.16 ABSOLUTE MAXIMUM RATINGS Output Voltage, VOUT . . . . . . . . . . . . . . 20 V Output Sustaining Voltage, VCE(sus) . . . 15 V Output Current, IOUT . . . . . . . . . . . . 50 mA Input Voltage Range, VIN . . . . . . . ...