Document
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HFA3824
June 1998 File Number 4308.1
Direct Sequence Spread Spectrum Baseband Processor
The Intersil HFA3824 Direct Sequence (DSSS) baseband processor is part of the PRISM™ 2.4GHz radio chipset, and contains all the functions necessary for a full or half duplex packet baseband transceiver. The HFA3824 has on-board ADC’s for analog I and Q inputs, for which the HFA3724/6 IF QMODEM is recommended. Differential phase shift keying modulation schemes DBPSK and DQPSK, with optional data scrambling capability, are combined with a programmable PN sequence of up to 16 bits. Built-in flexibility allows the HFA3824 to be configured through a general purpose control bus, for a wide range of applications. A Receive Signal Strength Indicator (RSSI) monitoring function with on-board 6-bit 2 MSPS ADC provides Clear Channel Assessment (CCA) to avoid data collisions and optimize network throughput. The HFA3824 is housed in a thin plastic quad flat package (TQFP) suitable for PCMCIA board applications.
Features
• • • • • • • • • • Complete DSSS Baseband Processor High Data Rate . . . . . . . . . . . . . . . . . . . . . . up to 4 MBPS Processing Gain . . . . . . . . . . . . . . . . . . . . . . . . up to 12dB Programmable PN Code . . . . . . . . . . . . . . . up to 16 Bits Ultra Small Package . . . . . . . . . . . . . . . . . . . . 7 x 7 x 1mm Single Supply Operation (33MHz Max) . . . . . 2.7V to 5.5V Single Supply Operation (44MHz Max) . . . . . 3.3V to 5.0V Modulation Method. . . . . . . . . . . . . . . .DBPSK or DQPSK Supports Full or Half Duplex Operations On-Chip A/D Converters for I/Q Data (3-Bit, 44 MSPS) and RSSI (6-Bit, 2 MSPS) • Backward Compatible with HSP3824
Applications
• • • • • • • • • • Systems Targeting IEEE802.11 Standard DSSS PCMCIA Wireless Transceiver Spread Spectrum WLAN RF Modems TDMA Packet Protocol Radios Part 15 Compliant Radio Links Portable Bar Code Scanners/POS Terminal Portable PDA/Notebook Computer Wireless Digital Audio Wireless Digital Video PCN/Wireless PBX
Ordering Information
PART NO. HFA3824IV HFA3824IV96 TEMP. RANGE ( oC) -40 to 85 -40 to 85 PKG. TYPE 48 Ld TQFP Tape and Reel PKG. NO. Q48.7x7
Pinout
IOUT QOUT
HFA3824 (TQFP)
TEST7 TEST6 TEST5 TEST4 TEST3 TEST2 TEST1 TEST0 VDD GND
Simplified Block Diagram
IIN
DE-SPREADER
3-BIT A/D
TEST_CK TX_PE TXD TXCLK TX_RDY GND VDD R/W CS VDDA GND IIN
1 2 3 4 5 6 7 8 9 10
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
RXCLK RXD MD_RDY RX_PE CCA GND MCLK VDD RESET ANTSEL A/D_CAL SD
QIN
3-BIT A/D
RSSI
6-BIT A/D
CCA
PROCESSOR INTERFACE
CTRL
IOUT SPREADER
26 11 25 12 13 14 15 16 17 18 19 20 21 22 23 24
QOUT
DPSK MOD.
GND VREFP
VREFN
VDDA
GND VDDA
VDD GND
QIN
RSSI
AS
4-1
SCLK
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved
PRISM and Design™ is a registered trademark of Intersil Corporation. PRISM™ is a trademark of Intersil Corporation.
DATA TO NETWORK PROCESSOR
DPSK DEMOD.
HFA3824 Table of Contents
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Application Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Control Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TX Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RX Port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I/Q ADC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC Calibration Circui.