SP5769

SP5769 3GHz I2C Bus Synthesiser Preliminary information DS4878 Issue 4.0 October 1999 Features G Complete 3·0 GHz Single Chip System G Optimised for Low Phase Noise, with Comparison G G G G G G G G G G G Ordering Information SP5769A/KG/MP1S (Tubes) SP5769A/KG/MP1T (Tape and Reel) SP5769A/KG/QP1S (Tubes) SP5769A/KG/QP1T (Tape and Reel) size equal to the loop comparison frequency and no prescaler phase noise degradation over the full RF operating range. The comparison frequency is obtained either from an on-chip crystal controlled oscillator, or from an external source. The oscillator frequency, fREF, or phase comparator frequency, fCOMP, can be switched to the REF/ COMP output providing a reference for a second frequency synthesiser. The synthesiser is controlled via an 12C bus Frequencies up to 4 MHz No RF Prescaler Selectable Reference Division Ratio Selectable Reference/Comparison Frequency Output Selectable Charge Pump Current with 10:1 Ratio Four Selectable I2C Addresses I2C Fast Mode Compliant with 3·3V and 5V Logic Levels Four Switching Ports Functional Replacement for SP5659 (except ADC) Pin Compatible with SP5655 Power Consumption 110mW with VCC = 5·5V, all Ports off ESD Protection 2kV min., MIL-STD-883B Method 3015 Cat.1 (Normal ESD handling procedures should be observed) Absolute Maximum Ratings All voltages are referred to VEE = 0V Supply voltage, VCC 0·3V to 17V RF differential input voltage 2·5Vp-p All I/O port DC offsets 20·3 to VCC 10·3V SDA and SCL DC offs...