74F398

74F398 74F399 Quad 2-Port Register April 1988 Revised August 1999 74F398 74F399 Quad 2-Port Register General Description The 74F398 and 74F399 are the logical equivalents of a quad 2-input multiplexer feeding into four edge-triggered flip-flops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flip-flops on the rising edge of the clock. The 74F399 is the 16-pin version of the 74F398, with only the Q outputs of the flip-flops available. Features s Select inputs from two data sources s Fully positive edge-triggered operation s Both true and complement outputs—74F398 Ordering Code: Order Number 74F398SC 74F398PC 74F399SC 74F399SJ 74F399PC Package Number M20B N20A M16A M16D N16E Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagrams 74F398 74F399 © 1999 Fairchild Semiconductor Corporation DS009533 www.fairchildsemi.com 74F398 74F399 Logic Symbols 74F398 74F398 74F399 74F399 IEEE/IEC Unit Loading/Fan Out U.L. Pin Names S CP I0a–I0d I1a–I1d Qa–Qd Qa–Qd Description...