Document
INTEGRATED CIRCUITS
74F379A Quad register
Product specification IC15 Data Handbook 1996 Mar 12
Philips Semiconductors
Philips Semiconductors
Product specification
Quad register
74F379A
FEATURES
• Edge–triggered D–type inputs • Buffered positive edge–triggered clock • Buffered common enable input • True and complementary outputs • Offers light loading PNP inputs (IIL = –20µA)
TYPE 74F379A TYPICAL fmax 200MHz
DESCRIPTION
The 74F379A is a 4–bit register with buffered common enable (E). This device is similar to the 74F175A but features the common enable rather than common master reset.
TYPICAL SUPPLY CURRENT (TOTAL) 29mA
ORDERING INFORMATION
ORDER CODE DESCRIPTION 16–pin plastic DIP 16–pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F379AN N74F379AD PKG, DWG. # SOT38–4 SOT109–1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
TYPE PINS D0 – D3 74F379A CP E Q0 – Q3 Data inputs Clock pulse input (active rising edge) Enable input (active low) True outputs DESCRIPTION 74F (U.L.) HIGH/ LOW 1.0/0.033 1.0/0.033 1.0/0.033 50/33 50/33 LOAD VALUE HIGH/LOW 20µA/20µA 20µA/20µA 20µA/20µA 1.0mA/20mA 15mA/20mA
Q0 – Q3 Complementary outputs Note to input and output loading and fan out table 1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
PIN CONFIGURATION
E Q0 Q0 D0 D1 Q1 Q1 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q3 Q3 D3 D2 Q2 Q2 CP
LOGIC SYMBOL
4 5 12 13
D0 D1 D2 D3 9 1 CP E Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3
3 VCC = Pin 16 GND = Pin 8
2
6
7
11 10 14 15
SF00354
SF00355
1996 Mar 12
2
853-0027 16555
Philips Semiconductors
Product specification
Quad register
74F379A
IEC/IEEE SYMBOL
1 9 G1 1C2 2 4 2D 3 7 5 6 10 12 11 15 13 14
FUNCTION TABLE
INPUTS E H L CP ↑ ↑ Dn X h OUTPUTS Qn NC H OUTPUT Qn NC L H
SF00356
L ↑ l L Notes to function table H = High–voltage level h = High state must be present one setup time before the low–to–high clock transition L = Low–voltage level l = Low state must be present one setup time before the low–to–high clock transition NC= No change X = Don’t care ↑ = Low–to–high clock transition
LOGIC DIAGRAM
D0 4 9 CP D CP E 1 E 3 VCC = Pin 16 GND = Pin 8 2 6 7 11 10 Q2 Q2 14 15 Q3 Q3 Q D CP E Q D CP E Q D Q D1 5 D2 12 D3 13
CP Q E
Q0 Q0
Q1 Q1
SF00357
1996 Mar 12
3
Philips Semiconductors
Product specification
Quad register
74F379A
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in high output state Current applied to output in low output state Operating free air temperature range Storage temperature range PARAMETER RATING –0.5 to +7.0 –0.5 to +7.0 –30 to +5 –0.5 to VCC 40 0 to +70 –65 to +150 UNIT V V mA V mA
°C °C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VIH VIL IIk IOH IOL Tamb Supply voltage High–level input voltage Low–level input voltage Input clamp current High–level output current Low–level output current Operating free air temperature range 0 4.5 2.0 0.8 –18 –1 20 +70 LIMITS NOM 5.0 MAX 5.5 V V V mA mA mA UNIT
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VOH High-level output voltage VCC = MIN, VIL = MAX, VIH = MIN, IOH = MAX VOL VIK II IIH IIL IOS Low-level output voltage VCC = MIN, VIL = MAX, VIH = MIN, IOL = MAX Input clamp voltage Input current at maximum input voltage High–level input current Low–level input current Short–circuit output current3 VCC = MAX -60 VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V VCC = MAX, VI = 2.7V ±10%VCC ±5%VCC ±10%VCC ±5%VCC MIN 2.5 2.7 3.4 0.35 0.35 –0.73 0.50 0.50 -1.2 100 20 –20 -150 LIMITS TYP2 MAX V V V V V µA µA µA mA UNIT
ICC Supply current (total) 29 42 mA Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1996 Mar 12
4
Philips Semiconductors
Product specification
Quad register
74F379A
AC ELECTRICAL CHARACTERISTICS
LIMITS Tamb = +25°C SYMBOL PARAMETER TEST CONDITION Waveform 1 Waveform 1 VCC = +5.0V CL = 50pF, RL = 500Ω MIN fmax tPLH tPHL Maximum clock frequency Propagation delay CP to Qn or Qn 175 2.0 4.0 TYP 200 3.5 5.5 6.5 8.0 .