SN74LS377

SN74LS377 Octal D Flip−Flop with Enable The SN74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. 8-Bit High Speed Parallel Registers Positive Edge-Triggered D-Type Flip Flops Fully Buffered Common Clock and Enable Inputs True and Complement Outputs Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage TA Operating Ambient Temperature Range 4.75 5.0 5.25 V 0 25 70 °C IOH Output Current − High IOL Output Current − Low − 0.4 8.0 mA mA 20 1 http://onsemi.com LOW POWER SCHOTTKY MARKING DIAGRAMS SN74LS377N AWLYYWW 1 PDIP−20 N SUFFIX CASE 738 20 1 LS377 AWLYYWW 1 SOIC−20 DW SUFFIX CASE 751D A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INFORMATION Device Package Shipping SN74LS377N PDIP−20 1440 Units/Box SN74LS377DW SOIC−WIDE 38 Units/Rail SN74LS377DWR2 SOIC−WIDE 2500/Tape & Reel © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 9 1 Publication Order Number: SN74LS377/D SN74LS377 CONNECTION DIAGRAM DIP (TOP VIEW) VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 E Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. E ENABLE 1 PIN NAMES E D0 − D3 CP Q0 − Q3 Q0 − Q3 Enable...