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SAA4997H

Philips

VErtical Reconstruction IC VERIC for PALplus

INTEGRATED CIRCUITS DATA SHEET SAA4977H Besic Preliminary specification File under Integrated Circuits, IC02 1998 Jul 2...


Philips

SAA4997H

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INTEGRATED CIRCUITS DATA SHEET SAA4977H Besic Preliminary specification File under Integrated Circuits, IC02 1998 Jul 23 Philips Semiconductors Preliminary specification Besic CONTENTS 1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 16 FEATURES GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION Analog-to-digital conversion Digital processing at 1fH level Digital processing at 2fH level Digital-to-analog conversion Microprocessor Memory controller Line locked clock generation Clock and sync interfacing 4 : 1 : 1 I/O interfacing Test mode operation I2C-bus control registers LIMITING VALUES THERMAL CHARACTERISTICS CHARACTERISTICS APPLICATION PACKAGE OUTLINE SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS SAA4977H 1998 Jul 23 2 Philips Semiconductors Preliminary specification Besic 1 FEATURES SAA4977H Internal prefilter Clamp circuit Analog AGC Line locked PLL Triple YUV 8-bit Analog-to-Digital Converter (ADC) Horizontal compression Field rate up-conversion (50 to 100 Hz or 60 to 120 Hz) 4 : 1 : 1 digital I/O interface Digital CTI (DCTI) Digital luminance peaking Triple 10-bit Digital-to-Analog Converter (DAC) Memory controller Embedded microprocessor 16 kbyte ROM 256 byte RAM I2C-bu...




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