May 1998
NDT3055 N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mod...
May 1998
NDT3055 N-Channel Enhancement Mode Field Effect
Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed.
Features
4 A, 60 V. RDS(ON) = 0.100 Ω @ VGS = 10 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package.
SuperSOTTM-3
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D
D
D
D
S D G SOT-223
G D S
S SOT-223*
(J23Z)
G
G
S
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage
TA = 25oC unless otherwise noted NDT3055 60 ±20
(Note 1a)
Units V V A
Gate-Source Voltage - Continuous Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1c)
4 25 3 1.3 1.1 -65 to 150
W
TJ,TSTG RθJA RθJC
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
42 12
°C/W °C/W
* Order option J23Z for cropped center drain lead.
© 1998 Fairchild Semiconductor Corporation
NDT305...